AD9562JP
Manufacturer: ADI
The Analog Devices AD9562JP is a high-performance dual 14-bit analog-to-digital converter (ADC) designed for use in demanding communication applications such as wireless base stations, cable headends, and wired communication systems.
Some of the key features and parameters of the AD9562JP are:
Dual 14-bit ADC with sampling rates up to 250 MSPS
SNR (signal-to-noise ratio) of 72.7 dBFS at 170 MHz input frequency and 250 MSPS sampling rate
SFDR (spurious-free dynamic range) of 87 dBc at 170 MHz input frequency and 250 MSPS sampling rate
On-chip sample-and-hold circuit and voltage reference
Parallel CMOS interface with separate data and frame clocks
Low power consumption of 1.3 W at 3.3 V supply voltage
Operating temperature range of -40°C to +85°C
80-lead LQFP (low-profile quad flat package) package
The AD9562JP also includes various performance enhancements such as a programmable gain amplifier, offset and phase adjustments, and a digital test pattern generator to facilitate testing and debugging of the ADC. The device is designed to operate from a single 3.3 V power supply and is compatible with a wide range of digital signal processors and field-programmable gate arrays.
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The Analog Devices AD9562JP is a high-performance dual 14-bit analog-to-digital converter (ADC) designed for use in demanding communication applications such as wireless base stations, cable headends, and wired communication systems.
Some of the key features and parameters of the AD9562JP are:
Dual 14-bit ADC with sampling rates up to 250 MSPS
SNR (signal-to-noise ratio) of 72.7 dBFS at 170 MHz input frequency and 250 MSPS sampling rate
SFDR (spurious-free dynamic range) of 87 dBc at 170 MHz input frequency and 250 MSPS sampling rate
On-chip sample-and-hold circuit and voltage reference
Parallel CMOS interface with separate data and frame clocks
Low power consumption of 1.3 W at 3.3 V supply voltage
Operating temperature range of -40°C to +85°C
80-lead LQFP (low-profile quad flat package) package
The AD9562JP also includes various performance enhancements such as a programmable gain amplifier, offset and phase adjustments, and a digital test pattern generator to facilitate testing and debugging of the ADC. The device is designed to operate from a single 3.3 V power supply and is compatible with a wide range of digital signal processors and field-programmable gate arrays.